Voltage regulators generate a constant DC output voltage and contain circuits that keep the output voltage on a supplied load at a regulated value. This task is typically accomplished using a switching power stage, the switches of which are turned on/off by respective driver circuits.
Modern microprocessors are supplied by voltage regulators and are capable of modifying their supply voltage to minimize power consumption, for example when the microprocessor is in a state of low-power consumption (standby). In practice, microprocessors are controlled by voltage regulators such that the voltage Vo supplied to them tracks a reference voltage Vref, as shown in FIG. 1. When the supplied microprocessor enters a state of low-power consumption, the reference voltage is reduced at a relatively slow rate (typically 2.5 mV/μs) and it is eventually increased at a relatively fast rate (typically, more than 10 mV/μs) when the microprocessor must quickly resume from a standby state.
A classic architecture of a switching regulator for supplying a microprocessor is shown by way of example in FIG. 2 and comprises an operational amplifier E/A, a comparator that generates a PWM signal by comparing the output of the error amplifier E/A with a ramp signal Vramp, and a switching power stage controlled by the PWM signal that generates the output voltage Vo with which the microprocessor is supplied. The regulator typically has a feedback line for generating an error signal as the difference between a filtered replica of the output voltage Vo and a reference voltage Vref. The difference between the output voltage Vo and the reference voltage Vref is compared with the ramp voltage Vramp and the PWM driving signal is generated as a function of this comparison, as usually done in PWM control circuits.
To reduce power consumption, microprocessors are usually equipped with a second feedback loop, as shown in FIG. 3, for reducing the voltage on the microprocessor by an amount proportional to the current absorbed by the microprocessor, such to keep constant the output impedance of the regulator. Such a control technique is disclosed for example in U.S. Pat. No. 6,628,110 to the present Assignee.
This technique involves:                accurate design of a compensation network capable of keeping constant the output impedance in a 0-1 MHz frequency interval when the reference voltage Vref is constant;        optimization of the output voltage for reducing power consumption when the load is constant but the reference voltage increases for making the microprocessor resume from a low-power consumption state; or        optimization of the output voltage for reducing power consumption when the load is constant but the reference voltage decreases.        
To prevent undue turn off of the microprocessor, the output voltage should not undershoot.
Typical voltage profiles of the circuit scheme of FIG. 3 are shown in FIG. 11. It may be noted that the ramp voltage Vramp has a certain offset to make the comparator, that generates the PWM driving signal by comparing the voltage Vcomp with the voltage Vramp, operate in a proper functioning region.
When current absorption by the supplied load drops, the comparison voltage Vcomp becomes practically null and an overshoot of the output voltage occurs. In case of a resume event of the supplied microprocessor from a low-power state, the comparison voltage Vcomp may take a relatively long time for crossing the ramp voltage Vramp causing an undershoot of the output voltage.
It would be desirable to have a switching DC-DC regulator architecture capable of limiting undershoots of the output voltage caused by fluctuations of the reference voltage Vref though allowing a fast resumption from a standby state.
The published U.S. Patent Application No. 2007/0273348 in the name of Intersil Americas Inc. discloses a PWM voltage regulator, depicted in FIG. 4, that includes an error amplifier input with a reference voltage Vref and a filtered replica of the output voltage, connected in a way to control a PWM power stage, and a cancellation network that injects into the error amplifier a current representative of the time derivative of the reference voltage. The voltage regulator of this prior disclosure may be effective in canceling both undershoots and overshoots of the output voltage with a same circuital network.
However, a drawback of using the voltage regulator disclosed in such reference, is that the output voltage increases too slowly and this delays resumption from standby of the supplied microprocessors.